DocumentCode :
607937
Title :
Digital interpolation and modulation system design for communication DACs
Author :
Ozbek, Gurer ; Kuyel, T.
Author_Institution :
Elektron. ve Haberlesme Muhendisligi Bolumu, Istanbul Teknik Univ., İstanbul, Turkey
fYear :
2013
fDate :
24-26 April 2013
Firstpage :
1
Lastpage :
4
Abstract :
In this work, design of an interpolation and modulation system to be used in next generation communication DACs (Digital to Analog Converters) is presented. First, the filters of the system are modeled using MATLAB. Second, digital design is done using Verilog language. Third, place and route is completed using CADENCE design tools and TSMC 0.18 μm CMOS process. Finally, post place and route simulations are performed. It is seen that the design operates at 1.2 GSPS and provides 99 dB spurious free dynamic range (SFDR), consuming 1.826 W. The SFDR performance of the design is 9-14 dB higher than similar ICs on the market today.
Keywords :
CMOS digital integrated circuits; circuit simulation; digital arithmetic; digital filters; digital-analogue conversion; hardware description languages; interpolation; modulation; next generation networks; CADENCE design tool; CMOS process; DAC; GSPS; Matlab; SFDR; TSMC; Verilog language; digital design; digital interpolation; digital to analog converter; filter modeling; modulation system design; next generation communication; post place simulation; power 1.826 W; route simulation; size 0.18 mum; spurious free dynamic range; Digital-analog conversion; Hardware design languages; Interpolation; MATLAB; Mathematical model; Modulation; Semiconductor device modeling; DAC; Digital Filter; Hardware; Interpolation; Modulation; SFDR; Verilog;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal Processing and Communications Applications Conference (SIU), 2013 21st
Conference_Location :
Haspolat
Print_ISBN :
978-1-4673-5562-9
Electronic_ISBN :
978-1-4673-5561-2
Type :
conf
DOI :
10.1109/SIU.2013.6531598
Filename :
6531598
Link To Document :
بازگشت