• DocumentCode
    608122
  • Title

    Compact modeling for simulation of circuit reliability: Historical and industrial perspectives

  • Author

    Lee, P.M.

  • Author_Institution
    Design Autom. Technol. Group, Elpida Memory, Inc., Sagamihara, Japan
  • fYear
    2013
  • fDate
    14-18 April 2013
  • Abstract
    This paper provides a historical background of the first developments of compact modeling for circuit-level reliability simulation at UC Berkeley, and the subsequent implementation into the BERT reliability simulator more than 20 years ago. A brief description of the advancement in the technology since then is given, and some industrial perspectives are summarized concerning how such a tool can be used to effectively optimize product design while ensuring reliability, as well as clarifying issues which still remain in the industrial design environment.
  • Keywords
    MOSFET; semiconductor device models; semiconductor device reliability; BERT reliability simulator; MOSFET; TIC Berkeley; circuit-level reliability simulation; compact modeling; historical perspectives; industrial design environment; industrial perspectives; product design; Degradation; Hot carriers; Integrated circuit modeling; Integrated circuit reliability; Reliability engineering; Semiconductor device modeling; NBTI; bipolar hot-carrier; circuit; circuit reliability; compact model; electromigration; hot-carrier; oxide breakdown; simulation;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium (IRPS), 2013 IEEE International
  • Conference_Location
    Anaheim, CA
  • ISSN
    1541-7026
  • Print_ISBN
    978-1-4799-0112-8
  • Electronic_ISBN
    1541-7026
  • Type

    conf

  • DOI
    10.1109/IRPS.2013.6531941
  • Filename
    6531941