• DocumentCode
    608293
  • Title

    Contributions of charge sharing and bipolar effects to cause or suppress MCUs on redundant latches

  • Author

    Kuiyuan Zhang ; Kobayashi, Kaoru

  • Author_Institution
    Kyoto Inst. of Technol., Kyoto, Japan
  • fYear
    2013
  • fDate
    14-18 April 2013
  • Abstract
    There are two of main factors, charge sharing and bipolar effects to cause or suppress SEUs and MCUs. Technology scaling increases the the role of bipolar effects with respect to multiple bit upsets. We analyze contributions of charge sharing and bipolar effects by changing the position of well contacts and the well structure. Device simulation results reveal that charge sharing and bipolar effect are suppressed effectively when the well contacts are placed in the middle of two latches.
  • Keywords
    flip-flops; radiation hardening (electronics); MCU; SEU; bipolar effect; charge sharing; redundant latches; technology scaling; well contact; well structure; Bipolar transistors; Electric potential; Integrated circuit modeling; Inverters; Latches; MOS devices; Transient analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Reliability Physics Symposium (IRPS), 2013 IEEE International
  • Conference_Location
    Anaheim, CA
  • ISSN
    1541-7026
  • Print_ISBN
    978-1-4799-0112-8
  • Electronic_ISBN
    1541-7026
  • Type

    conf

  • DOI
    10.1109/IRPS.2013.6532112
  • Filename
    6532112