Title :
Assessing the performance of multi-layer path computation algorithms for different PCE architectures
Author :
Martinez, Sonia ; Lopez, Victor ; Chamania, M. ; Gonzalez, O. ; Jukan, Admela ; Fernandez-Palacios, Juan Pedro
Author_Institution :
Telefonica I+D, Madrid, Spain
Abstract :
We have implemented a multi-layer PCE and compared performance of various algorithms using either one integrated, or two separate PCEs in each layer. Multi-layer integration reduces blocking by 13,91%, but increases computation time by 49,24%.
Keywords :
integration; optical communication; PCE architectures; multilayer PCE; multilayer integration; multilayer path computation; path computation element; Computer architecture; IP networks; Multiprotocol label switching; Network topology; Optical fiber networks; Optical fibers; Topology;
Conference_Titel :
Optical Fiber Communication Conference and Exposition and the National Fiber Optic Engineers Conference (OFC/NFOEC), 2013
Conference_Location :
Anaheim, CA
Print_ISBN :
978-1-4799-0457-0
