Sensorless dead-time exploration for digitally controlled switching converters

This paper proposes a sensorless dead-time exploration algorithm for a synchronous switching converter. An exploration algorithm using delay-line circuits instead of high frequency circuits is used to accelerate optimal dead-time searching and provide high quantization resolution with the dead-time step. The dead-time controller utilizes the relationship between the duty-cycle command and power loss to find the optimal dead-time without sensing any power-stage signals. This approach is well suited for digital integrated circuit implementation. Experimental results show that the converter, fabricated in the 0.18-μm CMOS process, can quickly find the optimal dead-time and improve efficiency.