Jitter error cancellation technique in digital domain for ADC

The impact on performance of Nyquist-rate analog-to-digital converters (ADC) with the presence of sampling clock jitter is first reviewed. Then the sampling clock jitter requirement is investigated based on the linearly approximated sampling model as well as the generic autocorrelation function approach. This leads to the motivation for cancelling the jitter-induced error in the digital domain. Two key points are desired in this method-acquisition of jitter quantities and signal derivative estimation. With the cancellation mechanism, the performance of a Nyquist ADC is improved to extend the performance at high-frequency input.