DocumentCode :
609822
Title :
Component layout influences on solder joint reliability studied using through life inspection techniques
Author :
Braden, Derek R. ; Yang, Ryan S.H. ; Duralek, Janusz ; Zhang, Guang-Ming ; Harvey, David M.
Author_Institution :
Delphi Electronics Group, Moorgate Road, Kirkby, L33 7XL, UK
fYear :
2012
fDate :
17-20 Sept. 2012
Firstpage :
1
Lastpage :
6
Abstract :
Many high reliability product applications such as automotive, military and avionics rely on Finite Element Analysis (FEA) or accelerated testing in order to assess the ‘in field’ reliability of solder interconnects. Although cyclic fatigue response of packaging interconnect styles is understood in terms of materials and CTE differences between component and board, less understood is the influence of component location and PCB constraint points on the PCB floor plan on the overall reliability performance of finished products. The study compares the results of finite element analysis with non-destructive through life measurements to assess both interconnect behaviour due to location on the test board and FEA model accuracy to real world conditions. This paper extends previous work by the authors [1] [2] to discussing improvements in modelling and through life measurement methodologies. The identified improvements demonstrating a more realistic understanding of package interconnect performance and a potential alternative to expensive and long duration test regimes.
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronic System-Integration Technology Conference (ESTC), 2012 4th
Conference_Location :
Amsterdam, Netherlands
Print_ISBN :
978-1-4673-4645-0
Type :
conf
DOI :
10.1109/ESTC.2012.6542182
Filename :
6542182
Link To Document :
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