Title :
Battling Bad Bits with Checksums in the Loris Page Cache
Author :
van Moolenbroek, D.C. ; Appuswamy, Rathinakumar ; Tanenbaum, Andrew S.
Author_Institution :
Dept. of Comput. Sci., Vrije Univ., Amsterdam, Netherlands
Abstract :
In this paper, we aim to improve the reliability of a central part of the operating system storage stack: the page cache. We consider two reliability threats: memory errors, where bits in DRAM are flipped due to cosmic rays, and software bugs, where programming errors may ultimately result in data corruption and crashes. We argue that by making use of checksums, we can significantly reduce the probability that either threat results in any application-visible effects. In particular, we can use checksums to detect memory corruption as well as validate the integrity of the cache´s internal state for recovery after a crash. We show that in many cases, we can avoid the overhead of computing checksums especially for these purposes. We implement our ideas in the Loris storage stack. Our analysis and evaluation show that our approach improves the overall reliability of the cache at relatively little added cost.
Keywords :
DRAM chips; cache storage; operating systems (computers); program debugging; DRAM; Loris page cache; Loris storage stack; checksum; data corruption; data crash; dynamic random access memory; memory corruption detection; memory error; operating system storage stack; programming error; reliability threat; software bugs; Computer bugs; Error correction codes; Operating systems; Software reliability;
Conference_Titel :
Dependable Computing (LADC), 2013 Sixth Latin-American Symposium on
Conference_Location :
Rio de Janeiro
Print_ISBN :
978-1-4673-5746-3
DOI :
10.1109/LADC.2013.10