Title :
Smart Cut™ technology provides excellent layer uniformity for fully depleted CMOS
Author :
Daval, N. ; Schwarzenbach, W. ; Moulin, Claude ; Bonnin, O. ; Barec, V. ; Kononchuk, O. ; Maddalon, C. ; Robson, T. ; Nguyen, Bac Xuan ; Mazure, C. ; Maleville, C.
Author_Institution :
Soitec, Bernin, France
Abstract :
Now that silicon product results are becoming available, and that the FD-SOI substrates hit the required uniformity to enable such products. It can now be said that Planar FDSOI is a credible manufacturing technology at 28nm. Furthermore, the technology is in place and has been proven to enable further scaling to at least the 10nm node.
Keywords :
CMOS integrated circuits; integrated circuit manufacture; silicon-on-insulator; FD-SOI substrates; Si; fully depleted CMOS; layer uniformity; manufacturing technology; planar FDSOI; silicon product; smart Cut technology; CMOS integrated circuits; Microscopy; Optical microscopy; Silicon; Substrates; Thickness measurement; Transistors;
Conference_Titel :
VLSI Technology, Systems, and Applications (VLSI-TSA), 2013 International Symposium on
Conference_Location :
Hsinchu
Print_ISBN :
978-1-4673-3081-7
Electronic_ISBN :
978-1-4673-6422-5
DOI :
10.1109/VLSI-TSA.2013.6545644
