DocumentCode
610862
Title
Fault Detection in RNS Montgomery Modular Multiplication
Author
Bajard, J. ; Eynard, J. ; Gandino, F.
Author_Institution
LIP6, Univ. Pierre et Marie Curie Paris, Paris, France
fYear
2013
fDate
7-10 April 2013
Firstpage
119
Lastpage
126
Abstract
Recent studies have demonstrated the importance of protecting the hardware implementations of cryptographic functions against side channel and fault attacks. In last years, very efficient implementations of modular arithmetic have been done in RNS (RSA, ECC, pairings) as well on FPGA as on GPU. Thus the protection of RNS Montgomery modular multiplication is a crucial issue. For that purpose, some techniques have been proposed to protect this RNS operation against side channel analysis. Nevertheless, there are still no effective and generic approaches for the detection of fault injection, which would be additionnally compatible with a leak resistant arithmetic. This paper proposes a new RNS Montgomery multiplication algorithm with fault detection capability. A mathematical analysis demonstrates the validity of the proposed approach. Moreover, an architecture that implements the proposed algorithm is presented. A comparative analysis shows that the introduction of the proposed fault detection technique requires only a limited increase in area.
Keywords
cryptography; fault diagnosis; field programmable gate arrays; residue number systems; FPGA; GPU; RNS; RNS Montgomery modular multiplication; cryptographic functions; fault attacks; fault detection; fault injection; leak resistant arithmetic; modular arithmetic; side channel attacks; Computer architecture; Cryptography; Fault detection; Hardware; Redundancy; Resistance; Standards; Base Conversions; Fault Detection; Montgomery Reduction; Residue Number System;
fLanguage
English
Publisher
ieee
Conference_Titel
Computer Arithmetic (ARITH), 2013 21st IEEE Symposium on
Conference_Location
Austin, TX
ISSN
1063-6889
Print_ISBN
978-1-4673-5644-2
Type
conf
DOI
10.1109/ARITH.2013.31
Filename
6545899
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