DocumentCode :
610955
Title :
A Reconfigurable Architecture for 1-D and 2-D Discrete Wavelet Transform
Author :
Qing Sun ; Jiang Jiang ; Yongxin Zhu ; Yuzhuo Fu
Author_Institution :
Sch. of Microelectron., Shanghai Jiao Tong Univ., Shanghai, China
fYear :
2013
fDate :
28-30 April 2013
Firstpage :
81
Lastpage :
84
Abstract :
In this paper, we propose a novel architecture for DWT that can be reconfigured to be adapted to different kinds of filter banks and different sizes of inputs. High flexibility and generality are achieved by using the MAC loop based filter(MLBF). Classic methods, such as polyphase structure and fragment-based sample consumption, are used to enhance the parallelism of the system. The architecture can be reconfigured to 3 modes to deal with 1-D or 2-D DWT with different bandwidth and throughput requirements.
Keywords :
VLSI; channel bank filters; discrete wavelet transforms; field programmable gate arrays; mathematics computing; reconfigurable architectures; 1D discrete wavelet transform; 2D discrete wavelet transform; DWT; FPGA implementation; MAC loop based filter; MLBF; VLSI architectures; bandwidth requirements; filter banks; fragment-based sample consumption; polyphase structure; reconfigurable architecture; throughput requirements; Discrete wavelet transforms; Filter banks; Finite impulse response filters; Reconfigurable architectures; Very large scale integration; FPGA implementation; high flexibility; pipeline architecture; reconfigurable;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Field-Programmable Custom Computing Machines (FCCM), 2013 IEEE 21st Annual International Symposium on
Conference_Location :
Seattle, WA
Print_ISBN :
978-1-4673-6005-0
Type :
conf
DOI :
10.1109/FCCM.2013.23
Filename :
6545999
Link To Document :
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