Statistical Static Timing Analysis of Conditional Asynchronous Circuits Using Model-Based Simulation

Asynchronous designs are usually composed of conditional circuits. The analysis of these circuits is complex especially when delay variability is considered. In this paper, we design and implement a model-based Statistical Static Timing Analysis "SSTA" framework that is able to analyze conditional asynchronous circuits in efficient time. First, the paper introduces how the conditional circuits can be modeled, and then it shows how this model can be used to realize the SSTA analysis.