DocumentCode
612206
Title
Comparative study of Double Gate SOI FinFET and trigate Bulk MOSFET structures
Author
Singhal, Sharad ; Kumar, Sudhakar ; Upadhyay, Shraddha ; Nagaria, R.K.
Author_Institution
Dept. of Electron. & Commun. Eng., Motilal Nehru Nat. Inst. of Technol., Allahabad, India
fYear
2013
fDate
12-14 April 2013
Firstpage
1
Lastpage
5
Abstract
The impact of systematic variations on transistor performance is shown for the trigate Bulk MOSFET and Double Gate SOI FinFET. This paper compares the variations in threshold voltage, subthreshold swing and drain induced barrier lowering (DIBL) by varying physical dimensions (gate oxide thickness, channel width and channel length) of the devices mentioned above. It also compares the temperature profile of the devices along the channel length. The electrical characteristics and temperature profile of the devices were simulated with the help of Sentaurus TCAD. The results obtained from the simulation reveal that trigate bulk MOSFET is more scalable than double gate SOI FinFET and can be used for better yield and reliability.
Keywords
MOSFET; semiconductor device reliability; silicon-on-insulator; technology CAD (electronics); Sentaurus TCAD; channel length; channel width; double gate SOI FinFET; drain induced barrier lowering; gate oxide thickness; systematic variations; transistor performance; trigate bulk MOSFET structures; FinFETs; Logic gates; Sensitivity; Threshold voltage; DIBL; Subthreshold swing; TCAD; reliability; threshold voltage;
fLanguage
English
Publisher
ieee
Conference_Titel
Engineering and Systems (SCES), 2013 Students Conference on
Conference_Location
Allahabad
Print_ISBN
978-1-4673-5628-2
Type
conf
DOI
10.1109/SCES.2013.6547510
Filename
6547510
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