Two exact methods for mapping on heterogeneous CPU/FPGA architectures

This research investigates the problem of the optimisation of static task mapping on a heterogeneous computing system CPU/FPGA (Central Processing Unit/Field-Programmable Gate Array) used to implement intimately coupled hardware and software models. In the face of obstacles as memory-wall, power wall and real-time requirements, hardware designers are directed more and more towards reconfigurable computing. The use of heterogeneous CPU/FPGA systems is one of the most promising solutions in order to increase the performance. Indeed, in such systems, multi-core processors (CPU) provide high computation rates while the reconfigurable logic (FPGA) offers high performance and adaptability to the application real-time constraints. However, heterogeneous computing systems present new challenges, and one of the most important issues is how to map efficiently the application tasks on the available resources while considering real-time constraints. This work includes the development of two exact methods that focus on the static initial task mapping, for two different case studies. In the first case, the execution is considered preemptive and the problem of task mapping is treated in terms of workload on the heterogeneous system. While in the second case the execution is considered non preemptive and the main objective is to minimize the makespan. In both case studies we consider communication constraints, since the application tasks are linked by precedence.