Experiences in side channel and testing based Hardware Trojan detection

Author

Hely, D. ; Martin, J. ; Triana, G.D.P. ; Mounier, S.P. ; Riviere, Etienne ; Sahuc, T. ; Savonet, J. ; Soundararadjou, L.

Author_Institution

Esisar-LCIS, Grenoble Inst. of Technol., Valence, France

fYear

2013

fDate

April 29 2013-May 2 2013

Firstpage

1

Lastpage

4

Abstract

In this work, we present and comment several experiments in Hardware Trojan detection based on both testing techniques and side channel analysis. This work has been developed by two teams of Grenoble INP students (Julien Martin, Gerson Dario Piraquive Triana, Simon Piroux Mounier, Elie Rivière, Thibault Sahuc, Jérémy Savonet and Laura Soundararadjou) during the secure IC design labs of the Grenoble INP Esisar and was then presented for the Embedded System Challenge during the Cyber Security Awareness Week (CSAW) 2012 organized by Polytechnic Institute of New York University.

Keywords

embedded systems; integrated circuit design; invasive software; CSAW; Grenoble INP Esisar; Grenoble INP students; Polytechnic Institute of New York University; cyber security awareness week; embedded system challenge; hardware trojan detection; integrated circuit design labs; side channel; Delays; Electromagnetic fields; Hardware; Indium phosphide; Power demand; Testing; Trojan horses; Hardware Trojan; Side channel Analysis; Trusted Hardware;

fLanguage

English

Publisher

ieee

Conference_Titel

VLSI Test Symposium (VTS), 2013 IEEE 31st

Conference_Location

Berkeley, CA

ISSN

1093-0167

Print_ISBN

978-1-4673-5542-1

Type

conf

DOI

10.1109/VTS.2013.6548924

Filename

6548924