DocumentCode :
614400
Title :
Modern wideband DRFM architecture and real-time DSP capabilities for radar test and evaluation
Author :
Olivier, K. ; Gouws, M.
Author_Institution :
Council for Sci. & Ind. Res. (CSIR), Pretoria, South Africa
fYear :
2013
fDate :
27-30 April 2013
Firstpage :
1
Lastpage :
4
Abstract :
Developments over the past decade in technology such as high-speed analog-to-digital converters (ADC), digital-to-analog converters (DAC) and field-programmable-gate-arrays (FPGA) contributed to the simplification of the hardware design of wideband digital radio frequency memories (DRFM). The progression in FPGA technology enabled the implementation of real-time wideband digital signal processing (DSP) algorithms for test and evaluation of present-day radars.
Keywords :
analogue-digital conversion; digital radio; digital-analogue conversion; field programmable gate arrays; radar signal processing; ADC; DAC; FPGA; analog-to-digital converter; digital-to-analog converter; field programmable gate array; hardware design; radar evaluation; radar test; real-time DSP capability; wideband DRFM architecture; wideband digital radio frequency memory; wideband digital signal processing algorithm; Digital signal processing; Field programmable gate arrays; Hardware; Modulation; Radar; Real-time systems; Wideband; DRFM; EA; FPGA; IBW; SFDR;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electronics, Communications and Photonics Conference (SIECPC), 2013 Saudi International
Conference_Location :
Fira
Print_ISBN :
978-1-4673-6196-5
Electronic_ISBN :
978-1-4673-6194-1
Type :
conf
DOI :
10.1109/SIECPC.2013.6551019
Filename :
6551019
Link To Document :
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