Title :
Integrating spin-torque-transfer magnetic memory in a 65 nm low power CMOS technology
Author :
Coolbaugh, D. ; Ranjan, Rajiv ; Abedifard, Ebi ; Pautler, Michelle ; Liehr, Michael
Author_Institution :
Coll. of Nanoscale Sci. & Eng., UAlbany, Albany, NY, USA
Abstract :
This paper shows results of the integration of a 65 nm low power CMOS technology with spin-torque-transfer magnetic memory. This effort has focused upon a set of compatible, stable, and high yielding fabrication modules. Magnetic Tunnel Junction (MTJ) devices from a 64Mb array are shown and the device radiation hardness is demonstrated.
Keywords :
CMOS integrated circuits; low-power electronics; magnetic recording; magnetic tunnelling; radiation hardening (electronics); 65 nm low power CMOS; MTJ; device radiation hardness; magnetic tunnel junction devices; memory size 64 MByte; size 65 nm; spin-torque-transfer magnetic memory; CMOS integrated circuits; Magnetic recording; Magnetic tunneling; Magnetization; Random access memory; Resistance; Switches;
Conference_Titel :
Advanced Semiconductor Manufacturing Conference (ASMC), 2013 24th Annual SEMI
Conference_Location :
Saratoga Springs, NY
Print_ISBN :
978-1-4673-5006-8
DOI :
10.1109/ASMC.2013.6552767
