DocumentCode :
614966
Title :
SpotMe effective co-optimization of design and defect inspection for fast yield ramp
Author :
Yan Pan ; Desineni, Rao ; Lambert, J. ; Teoh, Edward ; Berndt, Thomas ; Lim, Victor ; Goh Szu Huat ; Kim, Jung-Ho ; Kekare, Sagar
Author_Institution :
GLOBALFOUNDRIES Inc., Malta, NY, USA
fYear :
2013
fDate :
14-16 May 2013
Firstpage :
200
Lastpage :
205
Abstract :
A fast, production-ready yield learning methodology to identify and score critical hotspot patterns in an integrated circuit (IC) design is presented. The methodology, named SpotMe, correlates simulation-based design hotspots with inline defect inspection and enables co-optimization of process simulation models and defect inspection methods. The methodology is demonstrated on a 28nm GLOBALFOUNDRIES testchip and is validated using volume diagnosis results.
Keywords :
inspection; integrated circuit design; integrated circuit yield; optimisation; GLOBALFOUNDRIES testchip; SpotMe; cooptimization; critical hotspot patterns; inline defect inspection; integrated circuit design; production ready yield learning; size 28 nm; volume diagnosis; yield ramp; Correlation; Indexes; Inspection; Integrated circuit modeling; Optimization; Semiconductor device modeling; Systematics; PWQ; Yield ramp; defect inspection; design hotspot; volume diagnosis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Advanced Semiconductor Manufacturing Conference (ASMC), 2013 24th Annual SEMI
Conference_Location :
Saratoga Springs, NY
ISSN :
1078-8743
Print_ISBN :
978-1-4673-5006-8
Type :
conf
DOI :
10.1109/ASMC.2013.6552805
Filename :
6552805
Link To Document :
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