A digital calibration technique for cyclic ADCs using MOS capacitors

This paper presents a digital calibration technique for a cyclic analog-to-digital converter (cyclic ADC) using MOS capacitors (MOSCAPs) which has a large applied voltage dependency but a high capacitance per area. The cyclic ADC with MOSCAPs has a large integral nonlinearity (INL), while the differential nonlinearity (DNL) is very small. A digital calibration algorithm for reducing the INL is presented. A simplified algorithm for reduced hardware implementation still has sufficient small INL of +1.25/-0.25 LSB. The influence of other error sources including capacitor mismatch, amplifier finite gain and comparator offset is also discussed.