Design of Sobel operator using Field Programmable Gate Arrays

The last decade has a rapid development in the structure of a programmable processor called Field Programmable Gate Array (FPGA), which is used to implement a hardware circuit to perform the functions for high speed application. Sobel edge detection is a method to find the edge pixels in an image. This method exploits the change in intensity with respect to neighboring pixels. This paper introduces the implementation of Sobel edge detection method in the FPGA processor [1,2]. The implementation is performed based on two FPGA families from Xilinx, Spartan and Virtex. The cost of these implementations using Spartan3 is 41.66%, Spartan6 is 70%, Virtex5 is 3.69% and Virtex6 is 3.61 %. The frequency is 169.188 MHz for using Spartan3, 45.7 MHz for Spartan6, 85.060 MHz for Virtex5 and 65.8 MHz for Virtex6.