DocumentCode
618205
Title
Sensitivity analysis in the optimal sizing of analog ICs by evolutionary algorithms
Author
Guerra-Gomez, I. ; Tlelo-Cuautle, E. ; de la Fraga, Luis Gerardo
Author_Institution
Snowbush Mexico Design Center, SEMTECH, Mexico City, Mexico
fYear
2013
fDate
20-23 June 2013
Firstpage
3161
Lastpage
3165
Abstract
A multi-parameter sensitivity approach based on Richardson extrapolation, and applied to the optimal sizing of analog integrated circuits (ICs), is presented. First, the multiobjective evolutionary algorithm (EA) called non-dominated sorting genetic algorithm (NSGA-II), is applied to compute the feasible sizes of analog ICs, i.e. the optimal width and length (W/L) of every metal-oxide-semiconductor field-effect-transistor (MOSFET) is found. At this stage, the simulation program with integrated circuits emphasis (SPICE) is used to evaluate the electrical characteristics of analog ICs. Second, the multiparameter sensitivity analysis based on Richardson extrapolation, is applied to approximate the partial derivatives associated to the sensitivities on the performances of the ICs with respect to W/L of every MOSFET. The cases of study are three analog ICs, namely: voltage follower (VF), positive-type second generation current conveyor (CCII+), and current-feedback operational amplifier (CFOA). The proposed approach selects W/L feasible sizes presenting the lower sensitivities that are computed from the corresponding Pareto sets. Finally, 18 feasible (W/L sizes) solutions accomplishing 18 performance objectives and guaranteeing low W/L sensitivities for a complementary metal-oxide-semiconductor (CMOS) CFOA, are listed in Table I.
Keywords
CMOS analogue integrated circuits; MOSFET circuits; SPICE; current conveyors; extrapolation; genetic algorithms; Richardson extrapolation; analog integrated circuits; metal-oxide-semiconductor field-effect-transistor; multiobjective evolutionary algorithm; multiparameter sensitivity analysis; nondominated sorting genetic algorithm; optimal sizing; positive-type second generation current conveyor; simulation program with integrated circuits emphasis; voltage follower; Evolutionary computation; Extrapolation; Integrated circuits; MOSFET; Optimization; Sensitivity analysis; Circuit Sizing; Evolutionary Algorithms; MOSFET; Richardson extrapolation; Sensitivity;
fLanguage
English
Publisher
ieee
Conference_Titel
Evolutionary Computation (CEC), 2013 IEEE Congress on
Conference_Location
Cancun
Print_ISBN
978-1-4799-0453-2
Electronic_ISBN
978-1-4799-0452-5
Type
conf
DOI
10.1109/CEC.2013.6557956
Filename
6557956
Link To Document