Design and comparative analysis of differential current sensing comparator in deep sub — Micron region

Author

Kapadia, Dhanisha N. ; Gandhi, Priyesh P.

Author_Institution

L.C. Inst. of Technol., Bhandu, India

fYear

2013

fDate

11-12 April 2013

Firstpage

21

Lastpage

25

Abstract

In this paper a CMOS Differential current sensing comparator along with the Buffer stage has been introduced. The simulation is carried out in 130nm and 90nm technologies. The supply voltage for this comparator is 1.3v and 0.9v for 130nm and 90nm respectively. Various analysis of different characteristics of the comparator such as offset, ICMR, propagation delay, power dissipation has been carried out in both the technologies and the result has been compared for both the technologies. The simulation results shows that the speed of 1.48GHz and 1.06GHz with the power dissipation of 12.12mW and 133.76 was achieved in 90nm and 130nm technologies respectively.

Keywords

CMOS integrated circuits; comparators (circuits); CMOS differential current sensing comparator; ICMR; buffer stage; deep submicron region; frequency 1.06 GHz; frequency 1.48 GHz; power 12.12 mW; power dissipation; propagation delay; size 130 nm; size 90 nm; voltage 0.9 V; voltage 1.3 V; CMOS integrated circuits; Communications technology; Conferences; Latches; Propagation delay; Sensors; Transistors; Buffer stage; current sensing comparator; latch comparator;

fLanguage

English

Publisher

ieee

Conference_Titel

Information & Communication Technologies (ICT), 2013 IEEE Conference on

Conference_Location

JeJu Island

Print_ISBN

978-1-4673-5759-3

Type

conf

DOI

10.1109/CICT.2013.6558055

Filename

6558055