Title :
Time-interleaved pipeline ADC in transceivers for 60GHz applications
Author :
Sai, B. Ganesh ; Chandramani, P.
Author_Institution :
Dept. of Electron. & Commun., SSN Coll. of Eng., Kalavakkam, India
Abstract :
A 4-channel Time-Interleaved analog to digital convertor with 12-bits of resolution and sampling rate of 4 giga samples per second for 60GHz applications is designed using MATLAB SIMULINK macro blocks. The interleaving channels of Time-Interleaving analog to digital convertor (ADC) architecture, has a 4 stage Pipelined ADC with a 3-bit flash ADC followed by a 3-bit digital to analog convertor (DAC) at each stage. The residue obtained from each stage is forwarded to successive stages until last stage. The digital bits obtained from each stage are given to digital aggregation circuit and 12-bit digital output is obtained.
Keywords :
analogue-digital conversion; digital-analogue conversion; millimetre waves; radio transceivers; DAC; MATLAB SIMULINK macro blocks; analog to digital convertor; digital aggregation circuit; digital to analog convertor; frequency 60 GHz; time-interleaved pipeline ADC; transceivers; word length 12 bit; word length 3 bit; Binary codes; Conferences; Converters; MATLAB; Mathematical model; Pipelines; current steered DAC; interleaver; interleaving channels; sampling;
Conference_Titel :
Information & Communication Technologies (ICT), 2013 IEEE Conference on
Conference_Location :
JeJu Island
Print_ISBN :
978-1-4673-5759-3
DOI :
10.1109/CICT.2013.6558132
