Four quadrant analog multiplier with VCVS in deep-submicron technology

Author

Modi, Nipa B. ; Gandhi, Priyesh P.

Author_Institution

L.C. Inst. of Technol., Bhandu, India

fYear

2013

fDate

11-12 April 2013

Firstpage

1091

Lastpage

1094

Abstract

In this paper Four Quadrant Multiplier with voltage controlled voltage source in 130nm and 90nm technologies is presented. The supply voltage VDD for this multiplier is Iv and 0.9v for 130nm and 90nm respectively. Various analyses of different characteristics of the Multiplier has been carried out such as bandwidth, linearity, gain, power dissipation in both the technologies and the result has been compared for both the technologies. The bandwidth of the multiplier as measured from the simulation results is 72.45MHz and 115.90MHz along with the power dissipation of 25.14mW and 17mW for 130nm and 90nm CMOS process respectively.

Keywords

CMOS analogue integrated circuits; VHF circuits; analogue multipliers; radiofrequency integrated circuits; voltage multipliers; CMOS process; VCVS; deep-submicron technology; four quadrant analog multiplier; frequency 115.90 MHz; frequency 72.45 MHz; power 17 mW; power 25.14 mW; power dissipation; size 130 nm; size 90 nm; supply voltage VDD; voltage 0.9 V; voltage 1 V; voltage controlled voltage source; Communications technology; Conferences; MOSFET; Power dissipation; Threshold voltage; Voltage control; Analog Multiplier; Differential Input/Output Op-Amp; four-quadrant FVF Differential Structure;

fLanguage

English

Publisher

ieee

Conference_Titel

Information & Communication Technologies (ICT), 2013 IEEE Conference on

Conference_Location

JeJu Island

Print_ISBN

978-1-4673-5759-3

Type

conf

DOI

10.1109/CICT.2013.6558261

Filename

6558261