Practical limitations of state-of-the-art passive printed circuit board power delivery networks for high performance compute systems

Trends in high performance computing (HPC) systems point to ever-decreasing power delivery network (PDN) impedances. While there is no particular theoretical minimum impedance, practical limitations present boundaries which will be difficult to exceed. In this paper, we explore specifically the practical limitations of the printed circuit board (PCB) portion of the PDN, concluding that useful implementations will be limited to on the order of 0.2 mOhms below 1 MHz, rising to roughly 0.4 mOhms at 10 MHz, and increasing with frequency thereafter.