DocumentCode :
618515
Title :
Practical limitations of state-of-the-art passive printed circuit board power delivery networks for high performance compute systems
Author :
Smutzer, Chad M. ; Gilbert, B.K. ; Daniel, Erik S.
Author_Institution :
Special Purpose Processor Dev. Group (SPPDG), Mayo Clinic, Rochester, MN, USA
fYear :
2013
fDate :
12-15 May 2013
Firstpage :
1
Lastpage :
4
Abstract :
Trends in high performance computing (HPC) systems point to ever-decreasing power delivery network (PDN) impedances. While there is no particular theoretical minimum impedance, practical limitations present boundaries which will be difficult to exceed. In this paper, we explore specifically the practical limitations of the printed circuit board (PCB) portion of the PDN, concluding that useful implementations will be limited to on the order of 0.2 mOhms below 1 MHz, rising to roughly 0.4 mOhms at 10 MHz, and increasing with frequency thereafter.
Keywords :
parallel processing; printed circuits; HPC systems; PCB; PDN impedances; frequency 10 MHz; high-performance compute systems; high-performance computing systems; printed circuit board; state-of-the-art passive printed circuit board power delivery networks; Capacitors; Copper; Current measurement; Frequency measurement; Impedance; Impedance measurement; Inductance;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Signal and Power Integrity (SPI), 2013 17th IEEE Workshop on
Conference_Location :
Paris
Print_ISBN :
978-1-4673-5678-7
Type :
conf
DOI :
10.1109/SaPIW.2013.6558326
Filename :
6558326
Link To Document :
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