Power plane merger option based on load current behaviors

In a power distribution network (PDN) design, it is desirable to have a clean, undistorted power supply from the voltage source to each of the individual transistors in order for an integrated circuit (IC) to function properly. The optimum design for such PDN is to provide a large individual power plane from the power supply to each of the interfaces in the IC. However, due to form factor limitation and cost constraint, individual power plane supply is usually not feasible in a real-world design. Power planes merging is one of the common options used in most PDN design where some interfaces are designed to share the same power plane from the supply voltage to the pin of the IC. In this paper, a study on power plane merger option is carried out based on the load current behaviors of the interfaces. Preliminary simulation results show that power plane merging is effective for interfaces with current profile that has low frequency components or step function behavior. However, for the interfaces with fast or random switching patterns, power plane merging option is not advisable.