DocumentCode :
618589
Title :
Enabling cost-effective data processing with smart SSD
Author :
Yangwook Kang ; Yang-suk Kee ; Miller, Eric L. ; Chanik Park
Author_Institution :
Comput. Sci., UC Santa Cruz, Santa Cruz, CA, USA
fYear :
2013
fDate :
6-10 May 2013
Firstpage :
1
Lastpage :
12
Abstract :
This paper explores the benefits and limitations of in-storage processing on current Solid-State Disk (SSD) architectures. While disk-based in-storage processing has not been widely adopted, due to the characteristics of hard disks, modern SSDs provide high performance on concurrent random writes, and have powerful processors, memory, and multiple I/O channels to flash memory, enabling in-storage processing with almost no hardware changes. In addition, offloading I/O tasks allows a host system to fully utilize devices´ internal parallelism without knowing the details of their hardware configurations. To leverage the enhanced data processing capabilities of modern SSDs, we introduce the Smart SSD model, which pairs in-device processing with a powerful host system capable of handling data-oriented tasks without modifying operating system code. By isolating the data traffic within the device, this model promises low energy consumption, high parallelism, low host memory footprint and better performance. To demonstrate these capabilities, we constructed a prototype implementing this model on a real SATA-based SSD. Our system uses an object-based protocol for low-level communication with the host, and extends the Hadoop MapReduce framework to support a Smart SSD. Our experiments show that total energy consumption is reduced by 50% due to the low-power processing inside a Smart SSD. Moreover, a system with a Smart SSD can outperform host-side processing by a factor of two or three by efficiently utilizing internal parallelism when applications have light trafic to the device DRAM under the current architecture.
Keywords :
DRAM chips; energy consumption; flash memories; hard discs; operating systems (computers); parallel architectures; DRAM; Hadoop MapReduce framework; I/O channel; SATA-based SSD; SSD architecture; concurrent random write; cost-effective data processing; data processing capabilities; data traffic; data-oriented task; device internal parallelism; disk-based in-storage processing; flash memory; hard disk; hardware configuration; host system; in-device processing; low energy consumption; low-level communication; low-power processing; memory footprint; object-based protocol; offloading I/O task; operating system code; powerful processor; smart SSD model; solid-state disk; Ash; Computer architecture; Data models; Data processing; Hardware; Performance evaluation; Program processors;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Mass Storage Systems and Technologies (MSST), 2013 IEEE 29th Symposium on
Conference_Location :
Long Beach, CA
ISSN :
2160-195X
Print_ISBN :
978-1-4799-0217-0
Type :
conf
DOI :
10.1109/MSST.2013.6558444
Filename :
6558444
Link To Document :
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