DocumentCode :
618729
Title :
Power saving techniques to improve efficiency of a parallel-connected negative DC-DC converter
Author :
Eguchi, Kiyoshi ; Pongswatd, Sawai ; Thepmanee, Teerawat ; Fujimoto, Kenji ; Sasaki, Hiromu
Author_Institution :
Dept. of Inf. Electron., Fukuoka Inst. of Technol., Fukuoka, Japan
fYear :
2013
fDate :
15-17 May 2013
Firstpage :
1
Lastpage :
4
Abstract :
A parallel-connected negative DC-DC converter using power saving techniques has been proposed in this paper. Unlike conventional negative converters, the proposed converter consists of four negative heap converters connected in parallel, where the power switch is driven by non-overlapped four-phase pulses cyclically. In two of the four negative heap converters, a part of the electric charge in parasitic capacitances is reused in each clock cycle. For this reason, the proposed converter can reduce energy loss than the conventional converters. The validity of the proposed technique was confirmed by simulation program with integrated circuit emphasis (SPICE) simulations and theoretical analysis. When the output load is 1 kΩ, the proposed converter was able to improve power efficiency more than 11% compared to the conventional converter.
Keywords :
DC-DC power convertors; SPICE; capacitance; energy conservation; SPICE simulations; electric charge; energy loss; negative heap converter; nonoverlapped four-phase pulses; parallel-connected negative DC-DC converter; parasitic capacitance; power efficiency; power saving technique; power switch; resistance 1 kohm; simulation program with integrated circuit emphasis; Capacitors; Energy loss; Equivalent circuits; Parasitic capacitance; SPICE; Switches;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Electrical Engineering/Electronics, Computer, Telecommunications and Information Technology (ECTI-CON), 2013 10th International Conference on
Conference_Location :
Krabi
Print_ISBN :
978-1-4799-0546-1
Type :
conf
DOI :
10.1109/ECTICon.2013.6559515
Filename :
6559515
Link To Document :
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