DocumentCode :
618933
Title :
In-line testing of blind TSVs for 3D IC integration and M/NEMS packaging
Author :
Yichao Xu ; Guanjiang Wang ; Xin Sun ; Runiu Fang ; Min Miao ; Yufeng Jin
Author_Institution :
Shenzhen Grad. Sch., Peking Univ., Shenzhen, China
fYear :
2013
fDate :
7-10 April 2013
Firstpage :
233
Lastpage :
236
Abstract :
An in-line testing procedure of blind TSVs is put forward in this study. Insulation integrity is chosen to determine the eligibility. It is to probe the upper end of two or more neighboring TSVs during the manufacturing right after the blind vias being formed. Finite element method simulation was used to illustrate the testing principle, and experimental test were carried out for validation. During the test, leakage current data between two blind vias is obtained and I-V characteristic curve is plotted. It can be determined whether or not the TSVs are qualified.
Keywords :
electronics packaging; finite element analysis; integrated circuit testing; leakage currents; micromechanical devices; three-dimensional integrated circuits; 3D IC integration; I-V characteristic curve; MEMS packaging; NEMS packaging; blind TSV; finite element method; in-line testing; insulation integrity; leakage current; Current measurement; Insulation; Integrated circuits; Leakage currents; Semiconductor device measurement; Testing; Voltage measurement; 3D IC; TSV; in-line test; insulation integrity; leakage current;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nano/Micro Engineered and Molecular Systems (NEMS), 2013 8th IEEE International Conference on
Conference_Location :
Suzhou
Electronic_ISBN :
978-1-4673-6351-8
Type :
conf
DOI :
10.1109/NEMS.2013.6559722
Filename :
6559722
Link To Document :
بازگشت