DocumentCode :
619066
Title :
Discussion on the lapping and polishing process of 4H-SiC wafer
Author :
Wei Cheng ; Yugang Yin ; Yipan Li ; Haoer Zhang ; Shiming Zhang ; Lingyun Wang ; Daoheng Sun
Author_Institution :
Dept. of Mech. & Electr. Eng., Xiamen Univ., Xiamen, China
fYear :
2013
fDate :
7-10 April 2013
Firstpage :
841
Lastpage :
844
Abstract :
In order to achieve a high quality silicon carbide (SiC) film, the lapping and polishing process scheme was introduced in this paper. The ductile iron was utilized as lapping disc material, which can quickly thin the SiC wafer to the film of uniform thickness. After three-step lapping process, the thickness of the SiC wafer was reduced to 35 ± 4μm. In the process of polishing, a rough polishing and a fine polishing were studied by selecting suitable polishing liquid, polishing pad and parameters. The results show that the lapping and polishing procedure can realize large area and high quality SiC films: the film thickness, 30 ± 2μm and the surface roughness RMS, 0.69 nm.
Keywords :
chemical mechanical polishing; ductility; iron; lapping (machining); semiconductor thin films; silicon compounds; surface roughness; wide band gap semiconductors; CMP process; RMS; SiC; ductile iron; electrochemical polishing mechanism; fine polishing process; high quality silicon carbide film; lapping disc material; polishing liquid; polishing pad; rough polishing process; surface roughness; wafer lapping process scheme; wafer polishing process scheme; Films; Lapping; Rough surfaces; Silicon carbide; Surface roughness; Surface treatment; RMS; SiC; lapping and polishing; thickness;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Nano/Micro Engineered and Molecular Systems (NEMS), 2013 8th IEEE International Conference on
Conference_Location :
Suzhou
Electronic_ISBN :
978-1-4673-6351-8
Type :
conf
DOI :
10.1109/NEMS.2013.6559856
Filename :
6559856
Link To Document :
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