DocumentCode :
619476
Title :
GPU-based N-detect transition fault ATPG
Author :
Kuan-Yu Liao ; Sheng-Chang Hsu ; Li, James Chien-Mo
Author_Institution :
Dept. of Electr. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2013
fDate :
May 29 2013-June 7 2013
Firstpage :
1
Lastpage :
8
Abstract :
This is a massively parallel ATPG that explores device-level, block-level and word-level parallelism in GPU. Eight-detect transition fault ATPG experiments on large benchmark circuits show that our technique achieved 5.6 and 1.6 times speedup compared with a single-core and 8-core CPU commercial tool, respectively. Test patterns selected from our test set are about the same length and quality as those selected from commercial N-detect ATPG. To the best of our knowledge, this is the first proposed GPU-based ATPG algorithm.
Keywords :
graphics processing units; multiprocessing systems; GPU based N-detect transition fault ATPG; benchmark circuits; block level parallelism; commercial N-detect ATPG; device level parallelism; parallel ATPG; test patterns; word level parallelism; Automatic test pattern generation; Circuit faults; Cloning; Graphics processing units; Instruction sets; Kernel; Logic gates; GPU; N-detect; parallel; test generation;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location :
Austin, TX
ISSN :
0738-100X
Type :
conf
Filename :
6560621
Link To Document :
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