DocumentCode
619482
Title
The ITRS design technology and system drivers roadmap: Process and status
Author
Kahng, Andrew
Author_Institution
ECE Depts., Univ. of California at San Diego, La Jolla, CA, USA
fYear
2013
fDate
May 29 2013-June 7 2013
Firstpage
1
Lastpage
6
Abstract
The Design technology working group (TWG) is one of 16 working groups in the International Technology Roadmap for Semiconductors (ITRS) effort. It is responsible for the ITRS´ Design Chapter, which roadmaps design technology requirements and potential solutions for elements of the semiconductor supply chain that are produced by the electronic design automation (EDA) industry. The Design TWG is also responsible for the ITRS´ System Drivers Chapter, which roadmaps the key product classes that drive the leading-edge requirements for process and design technologies. Through these activities, the Design TWG sets a number of fundamental parameters in the overall ITRS: layout density, die size, maximum on-chip clock frequency, total chip power, SOC and MPU architecture models, etc. This paper reviews the process by which the Design TWG evolves its roadmap content, and some of the key modeling and roadmapping questions that the semiconductor and EDA industries will face in the near term.
Keywords
electronic design automation; integrated circuit layout; supply chains; system-on-chip; EDA; ITRS design technology; International Technology Roadmap for Semiconductors; MPU architecture models; SOC; die size; electronic design automation; layout density; on-chip clock frequency; semiconductor supply chain; system drivers roadmap; Computer architecture; FinFETs; Layout; Random access memory; System-on-chip; Technological innovation; Vehicles;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location
Austin, TX
ISSN
0738-100X
Type
conf
Filename
6560627
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