Title :
The impact of electromigration in copper interconnects on power grid integrity
Author :
Mishra, Vivekanand ; Sapatnekar, Sachin S.
Author_Institution :
ECE Dept., Univ. of Minnesota, Minneapolis, MN, USA
fDate :
May 29 2013-June 7 2013
Abstract :
Electromigration (EM), a growing problem in on-chip interconnects, can cause wire resistances in a circuit to increase under stress, to the point of creating open circuits. Classical circuit-level EM models have two drawbacks: first, they do not accurately capture the physics of degradation in copper dual-damascene (CuDD) metallization, and second, they fail to model the inherent resilience in a circuit that keeps it functioning even after a wire fails. This work overcomes both limitations. For a single wire, our probabilistic analysis encapsulates known realities about CuDD wires, e.g., that some regions of these wires are more susceptible to EM than others, and that void formation/growth show statistical behavior. We apply these ideas to the analysis of on-chip power grids and demonstrate the inherent robustness of these grids that maintains supply integrity under some EM failures.
Keywords :
electromigration; integrated circuit interconnections; metallisation; power grids; probability; statistical analysis; wires (electric); CuDD metallization; EM failure; circuit-level EM model; copper dual-damascene metallization; copper interconnect; electromigration; on-chip interconnect; on-chip power grid; power grid integrity; probabilistic analysis; statistical behavior; supply integrity; wire resistance; Current density; Integrated circuit interconnections; Mathematical model; Power grids; Resistance; Stress; Wires; Electromigration; power grid; process variation; robustness;
Conference_Titel :
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location :
Austin, TX