• DocumentCode
    619526
  • Title

    TinySPICE: A parallel SPICE simulator on GPU for massively repeated small circuit simulations

  • Author

    Lengfei Han ; Xueqian Zhao ; Zhuo Feng

  • Author_Institution
    Dept. of ECE, Michigan Tech. Univ., Houghton, MI, USA
  • fYear
    2013
  • fDate
    May 29 2013-June 7 2013
  • Firstpage
    1
  • Lastpage
    8
  • Abstract
    In nowadays variation-aware IC designs, cell characterizations and SRAM memory yield analysis require many thousands or even millions of repeated SPICE simulations for relatively small nonlinear circuits. In this work, we present a massively parallel SPICE simulator on GPU, TinySPICE, for efficiently analyzing small nonlinear circuits, such as standard cell designs, SRAMs, etc. In order to gain high accuracy and efficiency, we present GPU-based parametric three-dimensional (3D) LUTs for fast device evaluations. A series of GPU-friendly data structures and algorithm flows have been proposed in TinySPICE to fully utilize the GPU hardware resources, and minimize data communications between the GPU and CPU. Our GPU implementation allows for a large number of small circuit simulations in GPU´s shared memory that involves novel circuit linearization and matrix solution techniques, and eliminates most of the GPU device memory accesses during the Newton-Raphson (NR) iterations, which enables extremely high-throughput SPICE simulations on GPU. Compared with CPU-based TinySPICE simulator, GPU-based TinySPICE achieves up to 138X speedups for parametric SRAM yield analysis without loss of accuracy.
  • Keywords
    Newton-Raphson method; SPICE; SRAM chips; circuit simulation; data structures; graphics processing units; integrated circuit design; GPU; LUT; Newton-Raphson iterations; SRAM memory yield analysis; TinySPICE; cell characterizations; data structures; massively repeated small circuit simulations; nonlinear circuits; parallel SPICE simulator; variation-aware IC designs; Abstracts; Central Processing Unit; Educational institutions; Graphics processing units; Integrated circuit modeling; Mobile communication; Vectors; GPU computing; SPICE simulation; Variation-aware analysis;
  • fLanguage
    English
  • Publisher
    ieee
  • Conference_Titel
    Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
  • Conference_Location
    Austin, TX
  • ISSN
    0738-100X
  • Type

    conf

  • Filename
    6560682