DocumentCode :
619563
Title :
A novel analytical method for worst case response time estimation of distributed embedded systems
Author :
Jinwoo Kim ; Hyunok Oh ; Junchul Choi ; Hyojin Ha ; Soonhoi Ha
Author_Institution :
Sch. of Electr. Eng. & Comput. Sci., Seoul Nat. Univ., Seoul, South Korea
fYear :
2013
fDate :
May 29 2013-June 7 2013
Firstpage :
1
Lastpage :
10
Abstract :
In this paper, we propose a novel analytical method, called scheduling time bound analysis, to find a tight upper bound of the worst-case response time in a distributed real-time embedded system, considering execution time variations of tasks, jitter of input arrivals, and scheduling anomaly behavior in a multi-tasking system all together. By analyzing the graph topology and worst-case scheduling scenarios, we measure the conservative scheduling time bound of each task. The proposed method supports an arbitrary mixture of preemptive and non-preemptive processing elements. Its speed is comparable to compositional approaches while it gives a much tighter bound. The advantages of the proposed approach compared with related work were verified by experimental results with randomly generated task graphs and a real-life automotive application.
Keywords :
distributed processing; embedded systems; jitter; scheduling; conservative scheduling time bound analysis; distributed real-time embedded system; execution time variations; graph topology; jitter; multitasking system; nonpreemptive processing elements; real-life automotive application; worst case response time estimation; Educational institutions; Embedded systems; Estimation; Jitter; Processor scheduling; Time complexity; Time factors; Worst case response time; distributed embedded system; performance analysis;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location :
Austin, TX
ISSN :
0738-100X
Type :
conf
Filename :
6560722
Link To Document :
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