DocumentCode :
619571
Title :
A new time-stepping method for circuit simulation
Author :
Fang, G. Peter
Author_Institution :
Texas Instrum., Dallas, TX, USA
fYear :
2013
fDate :
May 29 2013-June 7 2013
Firstpage :
1
Lastpage :
10
Abstract :
Adaptive time-stepping is crucially important for the efficiency of a circuit simulator. Existing time-stepping methods rely on information at prior time point(s) to select step sizes, which can be problematic when the circuit is undergoing a fast transition. In this work, we propose a new time-stepping method that solves the circuit equations together with the condition for local truncation error (LTE) as one nonlinear system. Circuit solution and step size are obtained simultaneously for the current time point. It allows designers to have direct control of LTE so the errors can be distributed more evenly along non-uniformed time grid. Experiments show the new method generates significantly less time points and is faster for the same accuracy settings. It is also more accurate for the simulation of non-dissipative circuits.
Keywords :
differential equations; integrated circuit modelling; nonlinear network synthesis; adaptive time-stepping method; circuit simulation; fast transition; local truncation error; nondissipative circuits; prior time point; step sizes; Equations; Finite wordlength effects; Gears; Integrated circuit modeling; Mathematical model; Transient analysis; Vectors; Circuit Simulation; Differential Equations; Stepsize Control;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location :
Austin, TX
ISSN :
0738-100X
Type :
conf
Filename :
6560731
Link To Document :
بازگشت