DocumentCode :
619584
Title :
Routability-driven placement for hierarchical mixed-size circuit designs
Author :
Meng-Kai Hsu ; Yi-Fang Chen ; Chau-Chin Huang ; Tung-Chieh Chen ; Yao-Wen Chang
Author_Institution :
Grad. Inst. of Electron. Eng., Nat. Taiwan Univ., Taipei, Taiwan
fYear :
2013
fDate :
May 29 2013-June 7 2013
Firstpage :
1
Lastpage :
6
Abstract :
A wirelength-driven placer without considering routability could introduce irresolvable routing-congested placements. Therefore, it is desirable to develop an effective routability-driven placer for modern mixed-size designs employing hierarchical methodologies for faster turnaround time. This paper presents a novel two-stage technique to effectively identify design hierarchies and guide placement for better wirelength and routability. To optimize wirelength and routability simultaneously during placement, a new analytical net-congestion-optimization technique is also proposed. Compared with the participating teams for the 2012 ICCAD Design Hierarchy Aware Routability-driven Placement Contest, our placer can achieve the best quality (both the average overflow and wirelength) and the best overall score (by additionally considering running time).
Keywords :
integrated circuit design; network routing; optimisation; hierarchical mixed-size circuit designs; net-congestion-optimization technique; routability-driven placement; wirelength-driven placer; Algorithm design and analysis; Circuit synthesis; Estimation; Lead; Mathematical model; Optimization; Routing; Physical Design; Placement; Routability;
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location :
Austin, TX
ISSN :
0738-100X
Type :
conf
Filename :
6560744
Link To Document :
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