DocumentCode
619605
Title
Temperature aware thread block scheduling in GPGPUs
Author
Nath, R. ; Ayoub, Raid ; Rosing, Tajana Simunic
Author_Institution
Univ. of California, San Diego, La Jolla, CA, USA
fYear
2013
fDate
May 29 2013-June 7 2013
Firstpage
1
Lastpage
6
Abstract
In this paper, we present a first general purpose GPU thermal management design that consists of both hardware architecture and OS scheduler changes. Our techniques schedule thread blocks from multiple computational kernels in spatial, temporal, and spatio-temporal ways depending on the thermal state of the system. We can reduce the computation slowdown by 60% on average relative to the state of the art techniques while meeting the thermal constraints. We also extend our work to multi GPGPU cards and show improvements of 44% on average relative to existing technique.
Keywords
graphics processing units; integrated circuit design; processor scheduling; GPGPU; OS scheduler; general purpose GPU thermal management design; hardware architecture; multiple-computational kernels; spatio-temporal scheduling; temperature-aware thread block scheduling; thermal constraint; thermal state; Abstracts; Graphics processing units; Handheld computers; Kernel; Support vector machines;
fLanguage
English
Publisher
ieee
Conference_Titel
Design Automation Conference (DAC), 2013 50th ACM/EDAC/IEEE
Conference_Location
Austin, TX
ISSN
0738-100X
Type
conf
Filename
6560770
Link To Document