• DocumentCode
    62008
  • Title

    Pseudo-Linear Analysis of Bang-Bang Controlled Timing Circuits

  • Author

    Myeong-Jae Park ; Jaeha Kim

  • Author_Institution
    Sch. of Electr. & Comput. Eng., Seoul Nat. Univ., Seoul, South Korea
  • Volume
    60
  • Issue
    6
  • fYear
    2013
  • fDate
    Jun-13
  • Firstpage
    1381
  • Lastpage
    1394
  • Abstract
    This paper describes an accurate, yet analytical method to predict the key characteristics of a bang-bang controlled timing loop: namely, the jitter transfer (JTRAN), jitter generation (JG), and jitter tolerance (JTOL). The analysis basically derives a linearized model of the system, where the bang-bang phase detector is modeled as a set of two linearized gain elements and an additive white noise source. This phase detector (PD) model is by far the most extensive one in literature, which can correctly estimate the effects of random jitter, transition density, and finite loop latency on the loop characteristics. The described pseudo-linear analysis assumes the presence of random jitter at the PD input and the minimum jitter necessary to keep the linear model valid is derived, based on a describing function analysis and Nyquist stability analysis. The presented analysis re-confirms the findings of prior theories and provides theoretical basis to the prior empirically-drawn equations, such as those for the quantization noise power and the gain reduction in presence of a finite loop delay. The predictions based on the presented analysis match well with the results from time-accurate behavioral simulations.
  • Keywords
    bang-bang control; circuit stability; jitter; linear systems; phase detectors; white noise; JG; JTOL; JTRAN; Nyquist stability analysis; PD model; additive white noise source; bang-bang controlled timing circuits; bang-bang controlled timing loop characteristics; bang-bang phase detector; finite loop delay; finite loop latency; function analysis; gain reduction; jitter generation; jitter tolerance; jitter transfer; linearized gain elements; linearized model; phase detector model; pseudolinear analysis; quantization noise power; random jitter; time-accurate behavioral simulations; transition density; Analytical models; Delay; Jitter; Mathematical model; Noise; Phase locked loops; Bang-bang control; jitter generation; jitter tolerance; jitter transfer;
  • fLanguage
    English
  • Journal_Title
    Circuits and Systems I: Regular Papers, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    1549-8328
  • Type

    jour

  • DOI
    10.1109/TCSI.2012.2220502
  • Filename
    6339021