DocumentCode
621085
Title
Improving error detection with selective redundancy in software-based techniques
Author
Chielle, Eduardo ; Azambuja, Jose Rodrigo ; Barth, Raul Serio ; Kastensmidt, F.L.
Author_Institution
Inst. de Inf., Univ. Fed. do Rio Grande do SuI, Porto Alegre, Brazil
fYear
2013
fDate
3-5 April 2013
Firstpage
1
Lastpage
6
Abstract
This paper presents an analysis of the impact of selective software-based techniques to detect faults in microprocessor systems. A set of algorithms is implemented, compiled to a microprocessor and selected variables of the code are hardened with software-based techniques. Seven different methods that choose which variables are hardened are introduced and compared. The system is implemented over a miniMIPS microprocessor and a fault injection campaign is performed in order to verify the feasibility and effectiveness of each selective fault tolerance approach. Results can lead designers to choose more wisely which variables of the code should be hardened considering detection rates and hardening overheads.
Keywords
error detection; fault diagnosis; fault tolerant computing; microprocessor chips; redundancy; detection rates; fault injection campaign; fault tolerance approach; hardening overheads; miniMIPS microprocessor; selective redundancy; selective software based techniques; Cryptography; Registers;
fLanguage
English
Publisher
ieee
Conference_Titel
Test Workshop (LATW), 2013 14th Latin American
Conference_Location
Cordoba
Print_ISBN
978-1-4799-0595-9
Type
conf
DOI
10.1109/LATW.2013.6562659
Filename
6562659
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