Designing and testing a field programmable gate array based trigger system

Author

Leonida, Tudor ; Baran, Ileana ; Costea, Marian

Author_Institution

Univ. Politeh. of Bucharest, Bucharest, Romania

fYear

2013

fDate

23-25 May 2013

Firstpage

1

Lastpage

4

Abstract

This paper addresses the problem of recording those fast voltage variations with features that do not meet the conditions required by conventional trigger systems. It is about transients, with amplitudes below the minimum trigger level that is usually set higher than the maximum amplitude of the rated voltage. For this purpose, it is used a Butterworth numeric type filter, implemented on an field programmable gate array (FPGA) processor in order to obtain a trigger command at a slope variation of the traced signal.

Keywords

Butterworth filters; field programmable gate arrays; filtering theory; logic design; logic testing; trigger circuits; Butterworth numeric type filter; FPGA processor; fast voltage variations; field programmable gate array based trigger system design; field programmable gate array based trigger system testing; maximum rated voltage amplitude; minimum trigger level; slope variation; Digital filters; Field programmable gate arrays; Generators; IIR filters; Logic gates; Signal generators; Transient analysis; FPGA; fast transients; trigger system;

fLanguage

English

Publisher

ieee

Conference_Titel

Advanced Topics in Electrical Engineering (ATEE), 2013 8th International Symposium on

Conference_Location

Bucharest

Print_ISBN

978-1-4673-5979-5

Type

conf

DOI

10.1109/ATEE.2013.6563348

Filename

6563348