Implementation of real coded Genetic Algorithms using FPGA technology

The design presented in this paper is a Genetic Algorithm (GA) written in Vhsic Hardware Description Language (VHDL) and intended for a hardware implementation which is used for real time applications. The hardware implementation exploits the reprogrammability of certain types of Field-Programmable Gate Arrays (FPGAs) like those from Xilinx and provides a good optimization using all kinds of parallelism that allows the exploitation of several promising areas of the solution space at the same time. GAs are a family of computational models inspired by evolution allowing the optimization of many problems related to digital solution, econometrics and finance. These algorithms encode a potential solution to a specific problem on a simple chromosome like data structure and apply recombination operators to these structures to preserve critical information.