Modeling and Analysis of PDN Impedance and Switching Noise in TSV-Based 3-D Integration

This paper reports on modeling and analysis of power delivery network (PDN) impedance and switching noise in through silicon via (TSV)-based 3-D integration. PDN is simulated in SPICE with the combination of lumped-element models and distributed-element models, where the elements are extracted from full-wave electromagnetic modeling. PDN impedance explicitly distinguishes the contributions from off-chip PDN and on-chip PDN, and reveals the TSV-induced resonant effect associated with the 3-D chip stack. The simultaneously switching noises in PDN are simulated and analyzed in different frequency regions, in which 3-D integration has distinct impacts on the PDN impedance.