• DocumentCode
    62409
  • Title

    Single-Event Burnout Hardening of Power UMOSFETs With Integrated Schottky Diode

  • Author

    Ying Wang ; Cheng-Hao Yu ; Zheng Dou ; Wei Xue

  • Author_Institution
    Coll. of Inf. & Commun. Eng., Harbin Eng. Univ., Harbin, China
  • Volume
    61
  • Issue
    5
  • fYear
    2014
  • fDate
    May-14
  • Firstpage
    1464
  • Lastpage
    1469
  • Abstract
    This paper presents 2-D numerical simulation results of single-event burnout (SEB) for hardened power U-shaped gate MOSFET (UMOSFET) with Schottky diode (SD-UMOSFET). In this device, a Schottky diode is integrated into every unit cell of power UMOSFETs. We find that the Schottky contact can leak off the generated holes caused by an ion´s impact, and the SEB threshold voltage can be improved. The hardened structure means the addition of an N buffer layer based on a power UMOSFET here. So, the 70 V hardened power SD-UMOSFET discussed in this paper contains a Schottky diode and an N buffer layer, which can work normally without affecting steady-state characteristics. The reverse recovery characteristic and SEB performance of hardened SD-UMOSFET are both enhanced effectively. The reverse recovery time decreases 49%, the reverse recovery current peak decreases 56%, and the softness factor increases more than 100% when the hardened SD-UMOSFET is compared with the standard UMOSFET. In addition, the SEB threshold voltage increases to 64 V, which is 91% of the rated breakdown voltage.
  • Keywords
    Schottky barriers; Schottky diodes; buffer layers; numerical analysis; power MOSFET; radiation hardening (electronics); 2D numerical simulation; SEB performance; SEB threshold voltage; Schottky contact; buffer layer; hardened power U-shaped gate MOSFET; hardened structure; integrated Schottky diode; power UMOSFET; rated breakdown voltage; reverse recovery characteristic; reverse recovery current peak; reverse recovery time; single-event burnout hardening; softness factor; steady-state characteristics; unit cell; voltage 64 V; voltage 70 V; Buffer layers; Logic gates; MOSFET; Schottky barriers; Schottky diodes; Simulation; Standards; Hardened structure; Schottky diode; numerical simulation; single-event burnout (SEB); single-event burnout (SEB).;
  • fLanguage
    English
  • Journal_Title
    Electron Devices, IEEE Transactions on
  • Publisher
    ieee
  • ISSN
    0018-9383
  • Type

    jour

  • DOI
    10.1109/TED.2014.2312948
  • Filename
    6782711