A DC-coupled negative inductance circuit with integrated bias

Negative inductance circuits offer the potential for increased bandwidth in a variety of applications such as artificial magnetic conductors and metamaterials with negative permeability. To address such applications, a CMOS dc-coupled negative inductance circuit with integrated presented. The dc-coupled input is tailored voltages and accommodate applications having an inductive load in series with a low resistance. An integrated bias circuit is used to allow operation with a single power supply and to eliminate the need for a separate input bias. In addition, the parasitic capacitance of the CMOS transistors in the basic negative impedance inverter is used to set the negative inductance of the overall circuit. Results are presented that show a negative inductance of -11 0 nH in a 0.5 micron CMOS process.