A DC-coupled negative inductance circuit with integrated bias

Author

Kshatri, Varun S. ; Covington, John M. C. ; Shehan, Joshua W. ; Weldon, Thomas P. ; Adams, Ryan S.

Author_Institution

Dept. of Electr. & Comput. Eng., Univ. of North Carolina at Charlotte, Charlotte, NC, USA

fYear

2013

fDate

4-7 April 2013

Firstpage

1

Lastpage

4

Abstract

Negative inductance circuits offer the potential for increased bandwidth in a variety of applications such as artificial magnetic conductors and metamaterials with negative permeability. To address such applications, a CMOS dc-coupled negative inductance circuit with integrated presented. The dc-coupled input is tailored voltages and accommodate applications having an inductive load in series with a low resistance. An integrated bias circuit is used to allow operation with a single power supply and to eliminate the need for a separate input bias. In addition, the parasitic capacitance of the CMOS transistors in the basic negative impedance inverter is used to set the negative inductance of the overall circuit. Results are presented that show a negative inductance of -11 0 nH in a 0.5 micron CMOS process.

Keywords

CMOS integrated circuits; inductance; invertors; power integrated circuits; CMOS DC-couple negative inductance circuit; artificial magnetic conductors; inductive load; integrated bias circuit; low resistance; metamaterials; negative impedance inverter; negative permeability; size 0.5 micron; tailored voltages; CMOS integrated circuits; Impedance; Inductance; Inductors; Parasitic capacitance; Resistance; Transistors; CMOS; integrated circuit; negative impedance inverter; negative inductance;

fLanguage

English

Publisher

ieee

Conference_Titel

Southeastcon, 2013 Proceedings of IEEE

Conference_Location

Jacksonville, FL

ISSN

1091-0050

Print_ISBN

978-1-4799-0052-7

Type

conf

DOI

10.1109/SECON.2013.6567359

Filename

6567359