DocumentCode :
624187
Title :
Comparison of CMOS current conveyor circuits for non-Foster applications
Author :
Kshatri, Varun S. ; Covington, John M. C. ; Shehan, Joshua W. ; Weldon, Thomas P. ; Adams, Ryan S.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of North Carolina at Charlotte, Charlotte, NC, USA
fYear :
2013
fDate :
4-7 April 2013
Firstpage :
1
Lastpage :
4
Abstract :
Current conveyors are an important component implementing non-Foster circuits such as negative capacitors negative resistors. However, different topologies exist for implementing negative capacitance using a current conveyor, and the performance of such topologies can vary greatly. Therefore, this paper considers two competing realizations of negative capacitance using a current conveyor, where both circuits are designed for -5 pF in a 0.5 micron CMOS process. Simulation results are presented that show significant bandwidth differences for the two -5 pF designs, where one approach has more than twice the bandwidth of the second approach.
Keywords :
CMOS integrated circuits; capacitors; current conveyors; resistors; CMOS current conveyor circuit; capacitance -5 pF; negative capacitor; negative resistor; nonFoster circuit application; size 0.5 micron; Bandwidth; CMOS integrated circuits; Capacitance; Circuit topology; Impedance; Simulation; Topology; CM OS; bandwidth; negative capacitance; negative impedance converter; second generation current conveyor (CCII+);
fLanguage :
English
Publisher :
ieee
Conference_Titel :
Southeastcon, 2013 Proceedings of IEEE
Conference_Location :
Jacksonville, FL
ISSN :
1091-0050
Print_ISBN :
978-1-4799-0052-7
Type :
conf
DOI :
10.1109/SECON.2013.6567404
Filename :
6567404
Link To Document :
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