A novel single mask “pit and pitch” MOSFET design and simulation

This paper proposes a novel MOSFET design using a single mask. The proposed design, referred to as Pit and Pitch (PP), uses a single lithography step to “pit” layers of material and a series of angled implantations and depositions (the “pitch”) to build a vertically oriented MOSFET. Both n-channel and p-channel devices are simulated using Silvaco Athena and Atlas software and then compared to conventional MOSFETS of a similar lithographic node and evaluated on performance, economic and scaling possibilities. The results show that the PP MOSFET has very comparable performance to similarly sized MOSFETs and offers a large potential to reduce lithography costs.