Virtual finite-state-machine architectures for fast compilation and portability

FPGA productivity suffers from lengthy compilation times and limited portability. To address these issues, previous work introduced virtual architecture overlays that enable application portability across FPGAs and place-androute that is orders-of-magnitude faster than device vendor tools. However, those previous approaches have limited applicability due to a focus on pipelines with few control requirements. In this paper, we expand control capabilities of previous work by introducing virtual control architectures for finite state machines. The presented architectures reduce lookup-table requirements by multiple orders-of-magnitude and enable larger finite state machines used in common benchmarks.