DocumentCode
624340
Title
Fast lossless image compression with Radiation Hardening by hardware/software co-design on platform FPGAs
Author
Schmidt, Andrew G. ; French, Mark
Author_Institution
Inf. Sci. Inst., Univ. of Southern California, Los Angeles, CA, USA
fYear
2013
fDate
5-7 June 2013
Firstpage
103
Lastpage
106
Abstract
Motivated by the proposed NASA HyspIRI mission, our work improves existing Radiation Hardening by Software (RHBSW) techniques with FPGA Fabric Checkpoint/Restart (F2CPR) to bring enhanced hardware/software co-designed fault tolerance to commercial FPGA devices. We evaluate our approach on Fast Lossless (FL) image compression prediction for hyperspectral imagery in order to meet real-time performance requirements that cannot be achieved with aging radiation hardened devices. We report results across several metrics including resource utilization, performance, and an analysis of the vulnerability to Single Event Upsets (SEU) through the use of a hardware based fault injector. Results show low performance overhead (4-8%) achieving a speedup of 11.28× with a hardware accelerated implementation.
Keywords
checkpointing; data compression; fault tolerance; field programmable gate arrays; geophysical image processing; hardware-software codesign; hyperspectral imaging; radiation hardening; F2CPR; FL image compression prediction; FPGA fabric checkpoint/restart; NASA HyspIRI mission; RHBSW techniques; SEU; aging radiation hardened devices; commercial FPGA devices; fast lossless image compression prediction; hardware accelerated implementation; hardware based fault injector; hardware/software co-designed fault tolerance; hyperspectral imagery; performance overhead; platform FPGA; radiation hardening by software techniques; real-time performance requirements; resource utilization; single event upsets; Fabrics; Fault tolerance; Fault tolerant systems; Field programmable gate arrays; Hardware; Radiation hardening (electronics); Software;
fLanguage
English
Publisher
ieee
Conference_Titel
Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on
Conference_Location
Washington, DC
ISSN
2160-0511
Print_ISBN
978-1-4799-0494-5
Type
conf
DOI
10.1109/ASAP.2013.6567560
Filename
6567560
Link To Document