Title :
Reconfigurable computing middleware for application portability and productivity
Author :
Kirchgessner, Robert ; George, Alan D. ; Lam, H.K.
Author_Institution :
Dept. of Electr. & Comput. Eng., Univ. of Florida, Gainesville, FL, USA
Abstract :
Reconfigurable computing (RC) devices such as field-programmable gate arrays (FPGAs) offer significant advantages over fixed-logic, many-core CPU and GPU architectures, including increased performance for many computationally challenging applications, superior power efficiency, and reconfigurability. Difficulties of using FPGAs, however, has limited their acceptance in high-performance computing (HPC) and high-performance embedded computing (HPEC) applications. These difficulties stem from a lack of standards between FPGA platforms and the complexities of hardware design, and lead to higher costs and time to market over competing technologies. Differences in FPGA platform resources such as the type and number of FPGAs, memories and interconnects, as well as vendor-specific procedural APIs and hardware interfaces, inhibits application portability and code reusability. Despite efforts to reduce FPGA application design complexity through technologies such as high-level synthesis (HLS) tools, platform support and portability remains limited, and is typically left as a challenge for application developers. In this paper, we present a novel RC Middleware (RCMW), an extensible framework which enables FPGA application portability and enhances developer productivity by providing an application-centric development environment. Developers focus specifically on the optimal resources and interfaces required by their application, and RCMW handles the mapping and translation of those resources onto a target platform. We demonstrate that RCMW enables application portability over three heterogeneous platforms from two vendors, using both Xilinx and Altera FPGAs, with less than 10% performance and area overhead for several application kernels, and microbenchmarks for the common case. We present the productivity benefits of RCMW, showing that RCMW reduces required number of hardware and software driver lines of code and total development time with respect to native platform deploymen- methods for several application kernels.
Keywords :
field programmable gate arrays; high level synthesis; middleware; multiprocessing systems; parallel processing; reconfigurable architectures; software portability; Altera FPGA; FPGA application design complexity; FPGA platform resource; GPU architecture; HLS tool; HPC application; HPEC application; RC device; RC middleware; RCMW; Xilinx FPGA; application kernel; application portability; application-centric development environment; area overhead; code reusability; computationally challenging application; developer productivity; development time; field-programmable gate array; fixed-logic many-core CPU architecture; hardware design; hardware driver code lines; hardware interface; high-level synthesis tool; high-performance embedded computing; microbenchmark; platform deployment method; platform support; power efficiency; reconfigurability; reconfigurable computing device; reconfigurable computing middleware; resource mapping; resource translation; software driver code lines; vendor-specific procedural API; Computer architecture; Field programmable gate arrays; Hardware; IP networks; Middleware; Productivity; FPGA; portability; productivity; reconfigurable computing;
Conference_Titel :
Application-Specific Systems, Architectures and Processors (ASAP), 2013 IEEE 24th International Conference on
Conference_Location :
Washington, DC
Print_ISBN :
978-1-4799-0494-5
DOI :
10.1109/ASAP.2013.6567577